Growth & Innovation
The Internet of Things is fueling a long tail of applications in manufacturing, logistics, healthcare, consumer electronics and automotive.
The opportunity for semiconductor companies in the internet of things is projected to grow at an annual rate of 29% through 2020. There will be a tremendous diversity of IoT applications that demand low power and cost, rich multi-media, sensing, connectivity and software computation. To get ahead of demand will mean investments in IP, skills and blending of hardware and software.
However, there are a number of challenges facing the semiconductor sector including resource agility to enable product roadmap agility and ability to orchestrate the skills against the backdrop of a fragmented "long tail” of SoC applications. We are leaders in product engineering services for the semiconductor industry helping design chips at the leading edge of process nodes, foundries and IDMs. We have the capacity, capability and talent for tomorrow's SoC with services that span digital, analog mixed-signal as well as embedded software and hardware platforms.
Our services span silicon design, validation and verification to board and hardware systems to help address the industry needs of the automotive, industrial equipment, consumer electronics, networking and telecommunications sectors.
We are a leading provider of VLSI services and capability for the semiconductor industry from silicon design, validation and verification, board and hardware system design, BSP/device drivers and operating system bring -up, middleware and system integration.
Some of our services include:
Complete design to tested chip IP and SoC design services to build your product roadmap as an extension of your design organization.
With experience targeting most foundries and process nodes down to 10nm, we have abilities meeting quality and cost goals
- Design. Quality RTL results impacts area, power and performance and proper RTL design rule checking saves considerable design time and is the foundation of good quality and yield. Aricent SES has expertise in SoC design, RTL coding with SystemVerilog, design rule checking (linting, CDC) and constraint development and validation. Design for power, power estimation and design for performance capabilities ensure your designs are optimized for power, area and performance goals and are first time right.
- Design Verification. The cost of a full maskset re-spin is starting to exceed $5M below 16nm so arriving at the right design is critical. We have the strongest DV teams of any organization. We utilize formalized testplanning, assertion-based verification, HVLs with constrained random and functional coverage, as well as strong debug skills to gain this reputation. Power-aware verification and performance validation ensure designs meet key KPI and feature requirements of your customers.
- Design For Test, DFx. Today’s designs demand both low cost and high quality, especially in automotive and industrial applications. Our Design For Test methods include digital BIST and scan digital approaches and analog DFT from design through test generation, ATE bring up and optimization to meet target stuck-at and AC fault coverage levels and consequently PPM goals. Our DFR/DFQ/DFM capabilities target design for long life, grade 3/grade 2 automotive devices. With Aricent, we can help you optimize quality, yield and test time to meet your customer satisfaction and cost objectives from the utmost automotive quality standards to highly cost optimized, high volume consumer applications.
- Implementation & Physical Design. Time to market and PPA are both significantly affected by the strength of implementation flows and skills. Working with the latest processes, tools and talent, Aricent has a world class implementation capability that can deliver on-time, and with optimal results. Our advanced implementation flows cover synthesis, timing and power, signal integrity and noise analysis. Aricent starts implementation early in the design process optimizing floorplans, leveraging tools, methodologies and technologies to drive timing and physical closure while optimizing for power, performance, area and yield. Our expertise includes signal and power integrity, power and thermal analysis and optimization, with experience down to the most advanced process nodes of 10nm and beyond.
Analog, Mixed Signal (AMS)
Our strong analog, mixed signal team enables you to develop or migrate mixed signal designs ranging from high speed SERDES to standard cell libraries, memories and power circuits reliably.
- Design. SERDES, phys, PLL and other mixed signal designs - Aricent SES has a track record of successful mixed signal designs including high speed DDR phys and other critical IPs.
- AMS Verification and Modeling. Analog designs are subject to complex analysis that includes modeling process, voltage and temperature effects, as well as a variety of noise sources. Aricent SES has expertise in modeling and verification to ensure first time right success of these complex designs.
- Process Porting. We help clients with the right migration of designs to new process nodes is not "push-button" and requires Aricent SESs AMS design and verification expertise to ensure reliable results.
Embedded Platform Engineering
We deliver embedded SW & HW for a complete product. We help in complex programmable SoCs, driver, OS, firmware and communications & multimedia embedded SW to FPGA.
- 1200+ VLSI experts working across digital and analog design
- Complete semiconductor design solutions to allow clients to focus on core competencies and not miss important market opportunities
- Demonstrable client outcomes in power, performance and cost improvements
- Leading-edge process node experience down to 10nm and below to help de-risk client projects and shortening time-to-market
- Strategic relationships with 17 of the top 20 semiconductor companies
- Ability to deliver a unique “customer to chip” proposition to clients across industries that need smart silicon and embedded software to accelerate their R&D initiatives